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 FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
May 2008
FAN4174 / FAN4274 Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Features
200A Supply Current per Amplifier 3.7MHz Bandwidth Output Swing to Within 10mV of Either Rail Input Voltage Range Exceeds the Rails 3V/s Slew Rate 25nV/Hz Input Voltage Noise Replaces KM4170 and KM4270 FAN4174 Competes with OPA340 and TLV2461; Available in SC70-5 and SOT23-5 Packages FAN4274 Competes with OPA2340 and TLV2462; Available in MSOP-8 Package Fully Specified at +2.7V and +5V Supplies
Description
The FAN4174 (single) and FAN4274 (dual) are ultra-low cost voltage feedback amplifiers with CMOS inputs that consume only 200A of supply current per amplifier, while providing 33mA of output short-circuit current. These amplifiers are designed to operate from 2.5V to 5V supplies. The common mode voltage range extends beyond the negative and positive rails. The FAN4174 and FAN4274 are designed on a CMOS process and provide 3.7MHz of bandwidth and 3V/s of slew rate at a supply voltage of 5V. The combination of low power, rail-to-rail performance, low-voltage operation, and tiny package options make this amplifier family well suited for use in many general-purpose and battery-powered applications.
Applications
Portable / Battery-powered Applications PCMCIA, USB Mobile Communications, Cellular Phones, Pagers Notebooks and PDAs Sensor Interface A/D Buffer Active Filters Signal Conditioning Portable Test Instruments Figure 1. Frequency vs. Gain
Ordering Information
Part Number
FAN4174IP5X FAN4174IS5X FAN4274IMU8X
Operating Temperature Range
-40 to +85C -40 to +85C -40 to +85C
Package
5-Lead SC70 Package 5-Lead SOT23 Package 8-Lead Molded Small Outline Package
Eco Status
RoHS RoHS RoHS
Packing Method
Tape and Reel (3000) Tape and Reel (3000) Tape and Reel (3000)
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4 www.fairchildsemi.com
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Typical Application
Figure 2. Pin Configuration
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 2
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Pin Configurations
Figure 3. FAN4174 SOT23
Figure 4. FAN4147 SC70
Figure 5. FAN4274 MSOP
FAN4174 Pin Assignments
Pin #
1 2 3 4 5
Name
OUT -VS +IN -IN +VS
Description
Output Negative Supply Positive Supply Negative Input Positive Supply
FAN4274 Pin Assignments
Pin #
1 2 3 4 5 6 7 8
Name
OUT1 -IN1 +IN1 -VS +IN2 -IN2 OUT2 +VS
Description
Output, Channel 1 Negative Input, Channel 1 Positive Input, Channel 1 Negative Supply Positive Input, Channel 2 Negative Input, Channel 2 Output, Channel 2 Positive Supply
www.fairchildsemi.com 3
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Functional operation under any of these conditions is NOT implied. Performance and reliability are guaranteed only if operating conditions are not exceeded.
Symbol
VCC VIN TJ TSTG TL JA
Parameter
Supply Voltage Input Voltage Range Junction Temperature Storage Temperature Lead Soldering, 10 Seconds 5-Lead SOT23 Thermal Resistance
(1)
Min.
0 -VS-0.5 -65
Max.
6 +VS+0.5 +150 +150 +300 256 331 206
Unit
V V C C C C/W
5-Lead SC70 8-Lead MSOP
Note: 1. Package thermal resistance JEDEC standard, multi-layer test boards, still air.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
TA
Parameter
Operating Temperature Range
Min.
-40
Typ.
Max.
+85
Unit
C
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 4
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Electrical Specifications at +2.7V
VS=+2.7V, G=2, RL=10k to VS/2, RF=5k; unless otherwise noted.
Symbol
UGBW BW SS GBWP tR, fF OS SR HD2 HD3 THD en XTALK VIO dVIO Ibn PSRR AOL IS RIN CIN CMIR
Parameter
Conditions
G=+1
Min.
Typ.
4 2.5 4
Max.
Units
MHz MHz MHz ns % V/s dBc dBc % nV/Hz dB
Frequency Domain Response -3dB Bandwidth Gain Bandwidth Product Rise and Fall Time Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Voltage Noise Crosstalk (FAN4274) Input Offset Voltage Average Drift Input Bias Current Power Supply Rejection Ratio Open-loop Gain Supply Current per Amplifier Input Resistance Input Capacitance Input Common Mode Voltage Range Common Mode (2) Rejection Ratio FAN4174 FAN4274 FAN4174 (Typical) FAN4274 (Typical) DC, VCM=OV to 2.2V DC, VCM=OV to 2.2V 50 50
(2) (2) (2)
Time Domain Response VO=1.0V Step VO=1.0V Step VO=3V Step, G=-1 VO=1VPP, 10kHz VO=1VPP, 10kHz VO=1VPP, 10kHz 100kHZ -6 300 5 3 -66 -67 0.1 26 -100 0 2.1 5 DC DC 50 73 98 200 10 1.4 -0.3 to 2.6 -0.3 to 3.0 65 65 0.01 to 2.69 0.05 to 2.55 +34/-12 2.5 to 5.5 300 +6
Distortion and Noise Response
DC Performance mV V/C pA dB dB A G pF V
Input Characteristics
CMRR
dB
Output Characteristics VO ISC VS Output Voltage Swing
(2)
RL=10k to VS/2 RL=1k to VS/2
0.03
2.65 V
Short Circuit Output Current Power Supply Operating Range
mA V
Note: 2. 100% tested at 25C.
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 5
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Electrical Specifications at +5V
VS=+5V, G=2, RL=10k to VS/2, RF= 5k; unless otherwise noted.
Symbol
UGBW BW SS GBWP tR, fF OS SR HD2 HD3 THD en XTALK VIO dVIO Ibn PSRR AOL IS RIN CIN CMIR CMRR
Parameter
Conditions
G=+1
Min.
Typ.
3.7 2.3 3.7
Max.
Units
MHz MHz MHz ns % V/s dBc dBc % nV/Hz dB
Frequency Domain Response -3dB Bandwidth Gain Bandwidth Product Rise and Fall Time Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Voltage Noise Crosstalk (FAN4274) Input Offset Voltage Average Drift Input Bias Current Power Supply Rejection Ratio Open-loop Gain Supply Current per Amplifier Input Resistance Input Capacitance Input Common Mode Voltage Range Common Mode Rejection Ratio
(3) (3) (3) (3)
Time Domain Response VO=1.0V Step VO=1.0V Step VO=3V Step, G=-1 VO=1VPP, 10kHz VO=1VPP, 10kHz VO=1VPP, 10kHz 100kHZ -8 300 5 3 -80 -80 0.02 25 -100 0 2.9 5 DC DC 50 73 102 200 10 1.2 Typical DC, VCM=0V to VS 58 -0.3 to 5.3 73 0.01 to 4.99 0.1 to 4.9 33 2.5 to 5.5 300 +8
Distortion and Noise Response
DC Performance mV V/C pA dB dB A G pF V dB
Input Characteristics
Output Characteristics VO ISC VS Output Voltage Swing
(3)
RL=10k to VS/2 RL=1k to VS/2
0.03
4.95 V
Short Circuit Output Current Power Supply Operating Range
mA V
Note: 3. 100% tested at 25C.
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 6
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Typical Performance Characteristics
VS=+2.7, G=2, RL=10k to VS/2, RF=5k; unless otherwise noted.
Figure 6. Non-Inverting Frequency Response (+5)
Figure 7. Inverting Frequency Response (+5V)
Figure 8. Non-Inverting Frequency Response
Figure 9. Inverting Frequency Response
Figure 10. Frequency Response vs. CL
Figure 11. Frequency Response vs. RL
Figure 12. Large Signal Frequency Response (+5V)
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4 7
Figure 13. Open-loop Gain and Phase vs. Frequency
www.fairchildsemi.com
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Typical Performance Characteristic
VS=+2.7, G=2, RL=10k to VS/2, RF=5k; unless otherwise noted.
Figure 14. 2nd and 3rd Harmonic Distortion
Figure 15. 2nd Harmonic Distortion vs. VO
Figure 16. 3rd Harmonic Distortion vs. VO
Figure 17. CMRR VS=5V
Figure 18. PSRR VS=5V
Figure 19. Output Swing vs. Load
Figure 20. Pulse Response vs. Common Mode Voltage
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4 8
Figure 21. Input Voltage Noise
www.fairchildsemi.com
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Application Information
General Description
The FAN4174 amplifier includes single-supply, generalpurpose, voltage-feedback amplifiers, fabricated on a bi-CMOS process. The family features a rail-to-rail input and output and is unity gain stable. The typical noninverting circuit schematic is shown in Figure 22.
Overdrive Recovery
Overdrive of an amplifier occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the range is exceeded. The FAN4174 typically recovers in less than 500ns from an overdrive condition. Figure 24 shows the FAN4174 amplifier in an overdriven condition.
Figure 22. Typical Non-inverting Configuration
Figure 24. Overdrive Recovery
Input Common Mode Voltage
The common mode input range extends to 300mV below ground and to 100mV above VS in single supply operation. Exceeding these values does not cause phase reversal; however, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices begin to conduct. The output stays at the rail during this overdrive condition. If the absolute maximum input VIN (700mV beyond either rail) is exceeded, externally limit the input current to 5mA, as shown in Figure 23.
Driving Capacitive Loads
Figure 10 illustrates the response of the FAN4174 amplifier family. A small series resistance (RS) at the output of the amplifier, illustrated in Figure 25, improves stability and settling performance. RS values in Figure 10 were chosen to achieve maximum bandwidth with less than 2dB of peaking. For maximum flatness, use a larger RS. Capacitive loads larger than 500pF require the use of RS.
Figure 23. Circuit for Input Current Protection
Power Dissipation
The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150C, performance degradation occurs. If the maximum junction temperature exceeds 150C for an extended time, device failure may occur.
Figure 25. Typical Topology for Driving a Capacitive Load Driving a capacitive load introduces phase-lag into the output signal, which reduces phase margin in the amplifier. The unity gain follower is the most sensitive configuration. In a unity gain follower configuration, the FAN4174 amplifier family requires a 300 series resistor to drive a 100pF load.
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 9
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Layout Considerations
General layout and supply bypassing play major roles in high-frequency performance. Fairchild evaluation boards help guide high-frequency layout and aid in device testing and characterization. Follow the steps below as a basis for high-frequency layout: 1. 2. 3. 4. Include 6.8F and 0.01F ceramic capacitors. Place the 6.8F capacitor within 0.75 inches of the power pin. Place the 0.01F capacitor within 0.1 inches of the power pin. Remove the ground plane under and around the part, especially near the input and output pins, to reduce parasitic capacitance. trace lengths to reduce series
Minimize all inductances.
Refer to the evaluation board layouts shown in Figures 28-31 for more information. When evaluating only one channel, complete the following on the unused channel: 1. 2. Ground the non-inverting input. Short the output to the inverting input. Figure 26. FAN4174 Evaluation Board Schematic (KEV002/KEB011)
Evaluation Board Information
The following evaluation boards are available to aid in the testing and layout of this device:
Evaluation Board
KEB002
Description
Single Channel, Dual Supply, 5 and 6-Lead SOT23 Dual Channel, Dual Supply 8-Lead MSOP Single Channel, Dual Supply, 5 and 6-Lead SC70
Products
FAN4174IS5X
KEB010
FAN4274IMU8X
KEB011
FAN4174IP5X
Evaluation board schematics are shown in Figure 26 and Figure 27; layouts are shown in Figures 28-31.
Figure 27. FAN4274 Evaluation Board Schematic (KEB010)
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 10
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Board Layout Information
Figure 28. KEB002 (Top Side)
Figure 29. KEB002 (Bottom Side)
Figure 30. KEB010 (Top Side)
Figure 31. KEB010 (Bottom Side)
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 11
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Physical Dimensions
SYMM C L 0.95 0.95
3.00 2.80
5 4
A
B
3.00 2.60 1.70 1.50 2.60
1
2
3
(0.30) 0.95 1.90 0.50 0.30 0.20 CAB 0.70 1.00
TOP VIEW
LAND PATTERN RECOMMENDATION
SEE DETAIL A
1.30 0.90 0.15 0.05
1.45 MAX
C 0.10 C
0.22 0.08
NOTES: UNLESS OTHEWISE SPECIFIED
GAGE PLANE 0.25 8 0 0.55 0.35 0.60 REF
A) THIS PACKAGE CONFORMS TO JEDEC MO-178, ISSUE B, VARIATION AA, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) MA05Brev5
SEATING PLANE
Figure 32. 5-Lead SOT-23 Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 12
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Physical Dimensions
Figure 33. 5-Lead SC70 Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4 www.fairchildsemi.com 13
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
Physical Dimensions
0.65 B (1.30) (0.45)
3.000.10
A
(5.50) (4.20) 4.900.15 3.000.10 PIN #1 ID QUADRANT
LAND PATTERN RECOMMENDATION TOP VIEW
SEE DETAIL A
1.10MAX 0.150 0.050 0.380 C 0.270 0.10 0.23 0.13
0.65
END VIEW
12 TOP & BOTTOM ABC
SIDE VIEW
NOTES: A. CONFORMS TO JEDEC MO-187 B, DIMENSIONS ARE IN MM C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONS AND TOLERANCES ARE PER ASME Y14.5M, 1994 E LANDPATTERN AS PER IPC7351 #TSOP65P490X110-8BL
MKT-MUA08AREVB
Gauge Plane Seating Plane
0.25
0.70 0.40 0.95
DETAIL A
8 0
Figure 34. 8-Lead Molded Small Outline Package (MSOP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 14
FAN4174 / FAN4274 -- Single and Dual, Ultra-Low Cost, Rail-to-Rail I/O, CMOS Amplifier
(c) 2004 Fairchild Semiconductor Corporation FAN4174/FAN4274 * Rev. 1.0.4
www.fairchildsemi.com 15


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